The present invention relates to a semiconductor light emitting device structured to acquire a light at the surface side of a light emitting layer forming portion at which a semiconductor layer is laminated to form a light emitting layer. More particularly, the present invention relates to a semiconductor light emitting device structured to enable reduction of an effect of light interruption caused by an upper electrode and improvement of acquisition efficiency (external differential quantum efficiency) of the emitting light to the outside.
In a semiconductor light emitting device structured so that an upper electrode is provided on the surface of a semiconductor laminating portion and a light is emitted from the upper side thereof, the light is interrupted at the upper electrode thereof, and the light cannot be efficiently acquired. Moreover, a current flows from the upper electrode to a lower electrode, and thus, the current particularly concentrates at the lower side of the upper electrode, causing strong light emission at the lower side of the upper electrode. Therefore, there is a problem that the strongly emitted light cannot be efficiently acquired, the light at the outer periphery of a chip with its weak light emission is acquired without being interrupted by the electrode, and an acquisition ratio relevant to light emission quantity (external differential quantum efficiency) is low. In order to solve such a problem, for example, as shown in FIGS. 3A to 3C, a design is made such that a current is oriented from the upper electrode to the outer periphery without flowing such current to the lower side of the upper electrode.
In a structure shown in FIG. 3A, on a semiconductor substrate 21 consisting of an n-type GaAs, for example, there are epitaxially grown: an n-type clad layer 22 made of an n-type InGaAlP based semiconductor material; an active layer 23 consisting of an InGaAlP based semiconductor material with its constitution such than its band gap energy is lower than that of the clad layer; and a p-type clad layer 24 consisting of a p-type InGaAlP based semiconductor material, respectively, and a light emitting layer forming portion 29 with its double-hetero structure is formed. Then, at a portion corresponding to an upper electrode thereon, an insulating layer 30 such as SiO2 is interposed, and further, on its surface, a p-type window layer (current diffusion layer) 25 consisting of an AlGaAs based compound semiconductor is provided. At the center of its surface, an upper (p-side) electrode 27 is formed at a portion equivalent to the top of the previously described insulation layer 30, and a lower (n-side) electrode 28 is formed on the back surface of the semiconductor substrate. A contact layer consisting of GaAs or the like may be provided beneath the upper electrode 27.
In addition, in a structure shown in FIG. 3B, the previously described insulation layer 30 is provided in the middle of a window layer 25, and the other elements are structurally the same as those of FIG. 3A. Further, in a structure shown in FIG. 3C, the insulation layer is provided on the window layer 25, and the upper electrode 27 is formed so as to cover the insulating layer 30.
In the structures shown in FIGS. 3A and 3B described previously, a growing process is interrupted in the middle of epitaxial growth, and an etching process for forming an insulating layer must be incorporated. Therefore, there is a problem that the process becomes complicated and impurities is mixed during growth of the semiconductor layer, which causes contamination to occur easily. Further, even if the semiconductor layer is grown to be thick, there is a problem that a protrusion corresponding to the insulating layer is produced on the surface of the laminated semiconductor layer, and adhesion of the electrode deteriorates.
On the other hand, in the structure shown in FIG. 3C, there is no need to place the etching process in the middle of epitaxial growth. However, there easily occurs a problem that the upper electrode portion is exposed due to a shock or the like caused by wire bonding with the electrode for reasons such as the presence of a step of the upper electrode between portions at which the insulating layer is present and absent, and over-etching easily occurs up to the semiconductor layer when the insulating layer 30 under the upper electrode 27 is patterned.
The present invention has been made in order to solve the foregoing problem. It is an object of the present invention to provide a semiconductor light emitting device with its structure in which there is no need to place an etching process in the middle of an epitaxial growth process, and light emission efficiency can be improved without current flowing to the lower side of the upper electrode while the reliability of electrode is improved without causing a step to be produced at a portion at which the upper electrode is formed.
It is another object of the present invention to provide a method for manufacturing a semiconductor light emitting device capable of forming a current blocking layer with its simple production process, and moreover, in a flat state in which no step is produced on the surface.
A semiconductor light emitting device according to the present invention includes: a semiconductor substrate; a semiconductor laminating portion provided on the semiconductor substrate, and containing a light emitting layer forming portion having at least an n-type layer and a p-type layer and a window layer; an upper electrode partially provided on the semiconductor laminating portion; a lower electrode provided on the back surface of the semiconductor substrate, and a current blocking layer which is provided on a part of a surface of the semiconductor laminating portion beneath the upper electrode, wherein a surface of the current blocking layer and the surface of the semiconductor laminating portion are flat without a step.
With this structure, a site at which the upper electrode is formed is flat, and the reliability of adhesion of the upper electrode is extremely improved. In addition, there is no need to place an etching process in the middle of the epitaxial growth process, and the production process is extremely simplified. Moreover, a current blocking layer is provided immediately underneath the upper electrode. Thus, a current naturally flows the outer periphery side of the chip and does not flow the lower side of the upper electrode, so that the current can be extended to the entire chip.
The above-mentioned current blocking layer is formed of an electrically conductivity type layer which is different from an electrically conductivity type of a semiconductor layer of the surface of the semiconductor laminating portion or a high resistance layer caused by a crystalline defect.
A method for manufacturing a semiconductor light emitting device according to the present invention includes the steps of: growing a semiconductor laminating portion containing a light emitting layer forming portion having at least an n-type layer and a p-type layer and a window layer on a semiconductor substrate; providing a mask layer on the semiconductor laminating portion; etching the mask layer at a portion corresponding to a position at which an upper electrode is formed, thereby exposing a surface of the semiconductor laminating portion; carrying out a heat treatment under hydrogen atmosphere, thereby evaporating an element that constitutes a semiconductor layer of the surface of the semiconductor laminating portion exposed from the mask layer and producing a crystalline defect; removing only the mask layer; and forming an upper electrode at a site at which the crystalline defect is produced, in size which is greater than that of the site. It is noted that a mask layer may be formed by continuously growing a semiconductor layer or can be formed of an insulating layer such as SiO2.
Another aspect of a method for manufacturing a semiconductor light emitting device according to the present invention includes the steps of: growing a semiconductor laminating portion containing a light emitting layer forming portion having at least an n-type layer and a p-type layer and a window layer on a semiconductor substrate; forming a current blocking layer by changing partially a semiconductor layer of a surface of the semiconductor laminating portion to a different conductivity type region or an insulating region at a portion on which an upper electrode is formed, by a predetermined depth from the surface; and forming the upper electrode on the surface of the semiconductor laminating portion having the current blocking layer in size which is greater than that of the current blocking layer.